Resonant converter with synchronous average harmonic current control

ABSTRACT

A synchronous average harmonic current controller for a bidirectional resonant power converter provides efficient load invariant voltage gain. The controller includes a switched capacitor filter which averages and compensates a current signal over each half of the synchronous switching period. The control signal encodes an independent modulated phase and non-modulated differential duty cycle error response. The error response signals provide negative feedback to a pulse width modulation stage which results in reduction of the synchronous average harmonic current. At this operating point, the harmonic voltage gain is related closely to the commanded bridge duty cycles.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of U.S. provisional application63/197,556 filed Jun. 7, 2021, which is incorporated by reference hereinin its entirety

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STATEMENT REGARDING PRIOR DISCLOSURES BY THE INVENTOR OR A JOINTINVENTOR

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BACKGROUND OF THE INVENTION

The present disclosure generally relates to a bidirectional electronicpower conversion system and, more specifically, to a resonant powerconverter with synchronous average harmonic current control and methodsof controlling the same.

Resonant power converters are used to efficiently convert DC input powerto isolated DC output power with favorable magnetic integration. Inprior art (FIG. 1 ) voltage regulation is achieved by varying theprimary bridge (101) excitation frequency with a voltage controlledoscillator. The phase of the rectified secondary bridge (102) currentrelative to the voltage of the primary bridge results in highlyefficient soft switching behavior. Efficiency is further improved inprior art by using an ideal diode controller, such as a current zerocrossing detector, to control an active bridge rectifier. Resonant powerconverters can be implemented using relatively small transformers whoseinherent inductance forms part of the resonant filter (105).

The voltage gain for prior art resonant power converters is highly loaddependent. FIG. 2 shows the voltage gain calculated using a firstharmonic equivalent resistive load for the prior art resonant powerconverter shown in FIG. 1 . The results are normalized relative to theresonant frequency for resistive loads ranging from underdamped tooverdamped relative to the resonant filter impedance. The underdamped,or lightly loaded, case (201) achieves a large boost voltage gain belowthe natural frequency, but is unable to buck or significantly attenuatethe voltage above the natural frequency. The critically damped,moderately loaded, case (202) can only achieve moderate buck regulationand the overdamped, highly loaded, case (203) has significant buckregulation. The behavior for the prior art resonant power converter isundefined for power generating loads. Other prior art methods forregulating the output of resonant power converters include varying theduty cycle and phase which can also result in load and impedancedependent behavior when applied independently. It is desirable toimprove resonant power converters to allow for repeatable behavior overa wide range of regulation and load levels with reduced conduction loss.

BRIEF SUMMARY OF THE INVENTION

In one aspect, the objective of this invention is to implement anefficient bi-directional load invariant resonant power converter withvoltage gain dependent solely on commanded duty cycles. This objectiveis accomplished in the present invention by using a synchronous averageharmonic current controller to minimize the synchronous average harmonicbridge current with negative feedback. In the preferred embodiment (FIG.3 ), the synchronous average harmonic current controller is comprised ofthe non-resonant bridge current sensor (307), switched capacitor filter(308), and pulse width modulation stage (309). The switched capacitorfilter synchronously averages and compensates the bridge current signalover each half of the fundamental harmonic switching period. Twoindependent control signals are encoded by the switched capacitor filterin the modulated and non-modulated time reference frame by the switchedcapacitor difference and common signals. The pulse width modulationstage is sensitive to each of the independent control signal inputs. Thedifference signal is applied in the modulated reference frame to controlthe relative phase between the resonant and non-resonant bridges. Thecommon signal is applied in the non-modulated reference frame to controlthe differential duty cycle of the non-resonant bridge. Negativefeedback minimizes the total common and difference signal of synchronousaverage current. Reducing the synchronous average current results in theconverter approaching the ideal current required for harmonic powertransmission. As a consequence of the synchronous average harmoniccurrent being minimized, the converter achieves an equilibriumcontrolled by the harmonic voltage of each bridge. This results in thevoltage gain being well defined by the duty cycle command references tothe resonant and non-resonant bridges.

These and additional objects and advantages provided by the embodimentsdescribed herein will be more fully understood in view of the followingdetailed description, in conjunction with the drawings.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING(S)

FIG. 1 illustrates a prior art resonant power converter which usesvariable frequency to achieve voltage regulation.

FIG. 2 illustrates load dependency of the prior art resonant power shownin FIG. 1

FIG. 3 is a schematic showing an embodiment of the resonant powerconverter with synchronous average harmonic current control according toone or more embodiments shown and described herein.

FIG. 4 shows the equivalent functional block diagram representing thesynchronous average harmonic current controller shown in FIG. 3according to one or more embodiments shown and described herein.

FIG. 5 shows a square wave (SQ) which is used for synchronizing theconverter and its integral which is the triangle wave (TRI) used forpulse width modulation, and the differential duty cycle signal given byNEG(d) and POS(d), which are compared to the triangle wave to result inPMOD and NMOD, and the differential modulation waveform DMOD accordingto one or more embodiments shown and described herein.

FIG. 6A shows the switched capacitor filter response to low frequencyinputs from the current-sense amplifier, where the input (LF INPUT) isdynamically averaged and compensated by two independent capacitors (CAP1and CAP2) which are switched into the circuit every half periodsynchronously with a square wave, and the response of the two capacitorsis alternately sampled (SWCAP) according to one or more embodimentsshown and described herein.

FIG. 6B shows the switched (SWCAP) capacitor (CAP1 and CAP2) responsedue to high frequency input (HF input) according to one or moreembodiments shown and described herein.

FIG. 7A shows a process to take an existing signal input and modifydifferential duty cycle without affecting phase, where a positive andnegative differential duty cycle is added to a given input duty cycle toget signals d−∂d (702) and d+∂d (703) which are compared to the trianglewave (701) and result in their respective PWM signals (704 and 705)according to one or more embodiments shown and described herein.

FIG. 7B shows a process to take an existing signal input and modifyphase without affecting duty cycle, where a square wave is added to agiven input duty cycle, d (712), to get the signal ∂+φ (713) which iscompared to the triangle wave (711) and results in the respective PWMresponse (714 and 715) according to one or more embodiments shown anddescribed herein.

FIG. 8A Shows an example of maximum current transfer (801) versusnormalized carrier frequency according to one or more embodiments shownand described herein.

FIG. 8B Shows relative output current (802) versus normalized phaseshift between bridges according to one or more embodiments shown anddescribed herein.

FIG. 9A shows buck gain of the resonant power converter using a 1:1transformer by varying the input duty cycle (d₁=d, d₂=1/2) according toone or more embodiments shown and described herein.

FIG. 9B shows boost gain of the resonant power converter using a 1:1transformer by varying the output duty cycle (d₂=1/2−d) according to oneor more embodiments shown and described herein.

FIG. 9C shows the buck boost gain of the resonant power converter usinga 1:1 transformer by varying both the input and output duty cycle (d₁=d,d₂=1/2−d) according to one or more embodiments shown and describedherein

FIG. 10 shows the ratio of root mean square (RMS) transformer current toDC bus current for the input (1001) and output (1002) side of theresonant power converter operating with buck gain according to one ormore embodiments shown and described herein.

FIG. 11A show the current in the non-resonant transformer coil (1103)for a 12.5% input duty cycle along with gate waveforms (1101 and 1102)according to one or more embodiments shown and described herein.

FIG. 11B shows the current in the non-resonant transformer coil (1113)for a 25% input duty cycle along with gate waveforms (1111 and 1112)according to one or more embodiments shown and described herein.

FIG. 11C shows the current in the non-resonant transformer coil (1123)for a 50% input duty cycle along with gate waveforms (1121 and 1122)according to one or more embodiments shown and described herein.

FIG. 12A shows an embodiment of the resonant power converter with aninput on its resonant side and load on its non-resonant side accordingto one or more embodiments shown and described herein.

FIG. 12B shows an embodiment of the resonant power converter with aninput on its non-resonant side and load on its resonant side accordingto one or more embodiments shown and described herein.

FIG. 13 shows an embodiment of the resonant power converter with aresonant input, a non-resonant output, and an auxiliary resonant outputaccording to one or more embodiments shown and described herein.

DETAILED DESCRIPTION OF THE INVENTION

Embodiments described herein generally relate to a resonant powerconverter and methods of forming a resonant power converter withsynchronous average harmonic current control. As shown and describedherein, new embodiments of resonant power converters with synchronousaverage harmonic current control are provided. The presently inventedconverter controls the synchronous harmonic current between two isolatedbridges to allow for buck-boost voltage regulation with good power andparts count efficiency.

Turning now to the drawings wherein like numbers refer to likestructures, the first embodiment of the presently invented powerconverter is shown in FIG. 3 . The power converter is bi-directional andtherefore the terms ‘primary’ and ‘secondary’ are not used. Instead, theconverter has a resonant bridge (301) referenced to a first reference(303) and a non-resonant bridge (302) referenced to a second reference(304). The resonant bridge applies a voltage across a resonant network(305) in series with an isolation transformer (310) which is connecteddirectly to the non-resonant bridge. An arbitrary duty cycle controlsthe buck gain using the resonant bridge PWM controller (306). Thenon-resonant bridge is harmonically synchronized to the resonant bridgeby feeding the non-resonant bridge current sensor (307) to thesynchronous average harmonic controller (308). An arbitrary duty cyclecontrols the boost gain using the non-resonant bridge PWM controllerwith synchronous feedback from the synchronous average harmoniccontroller. The synchronous average harmonic controller results in theconverter having low conduction losses and a load invariant gaincontrolled by its boost and buck duty cycle commands.

The power transfer in FIG. 3 is accomplished by the resonant bridge(301), resonant network (305), isolation transformer (310), andnon-resonant bridge (302). The resonant bridge (301) is an H-bridgecomposed of four switches (SA. SAN, SB, SBN) and their respective diodes(DA. DAN, DB, DBN) with complementary (N1, N2) gate inputs. The switchesSA and SAN (and SB and SBN) are driven with complementary signals usingN1 (and N2) with sufficient dead-time to prevent shoot-through current.The differential voltage between VA and VB of the resonant bridge isapplied to the resonant network (305) and transformer (310). Theresonant network is composed of a series capacitor (CR) and/or inductor(LR) and may optionally have a parallel magnetizing inductance (Lm). Theresonant network acts as a harmonic filter for the voltage isolated bythe transformer (310) which is composed of coupled inductors LT1 andLT2. The first embodiment uses a 1:1 turns ratio for descriptivesimplicity, but may be generalized to other turns ratios byproportionally scaling voltage and current inversely with powerpreserved. The transformer is directly connected to the non-resonantbridge (302) at VC and VD. The non-resonant bridge is an H-bridgecomposed of four switches (SC, SCN, SD, SDN) and their diodes (DC, DCN,DD, DDN) with complementary (N3, N4) gate inputs. The switches SC andSCN (and SD and SDN) are driven with complementary signals using N3 (andN4) with sufficient dead time to prevent shoot through current. Eachswitch (SA, SAN, SB, SBN, SC, SCN, SD, SDN) has either an external orapparent built-in diode to prevent excessive reverse voltage. Theswitches are implemented according to the state of the art, with MOSFETsor GANFETS being used in the preferred embodiment.

The power converter duty cycle inputs, d1 and d2, are modulated by theresonant bridge PWM controller (306), and the non-resonant bridge PWMcontroller (309) shown in FIG. 3 . The resonant bridge PWM controller(306) has a triangle waveform (TRI) and duty cycle (d1) as inputs. Thecontroller (306) inverts the duty cycle using R41, R42 and OP4 andcompares both the noninverted and inverted duty cycle signals to thetriangle waveform using comparators CMP103 and CMP104 to drive theresonant bridge signals gA and gB respectively. The non-resonant bridgePWM controller (309) uses a triangle wave with superimposed synchronousaverage harmonic feedback control signal and duty cycle (d2) as inputs.This controller (309) inverts the duty cycle using R31, R32 and OP3 andcompares both the noninverted and inverted duty cycle signals to thetriangle waveform with superimposed feedback using comparators CMP101and CMP102 to drive the non-resonant bridge signals gC and gDrespectively. The components of blocks 306, 307, 308, and 309 may beimplemented as discrete elements on a printed circuit board or packagedtogether in an integrated circuit.

The synchronous average harmonic controller (308) uses input from thenon-resonant bridge current sensor (307) to minimize the synchronousaverage harmonic current. The non-resonant bridge current sensor (307)senses the shunt resistors RS1 and RS2 and amplifies their signals usingthe difference amplifier OP1 with gain setting resistors R11, R12, R13,R14. The current sensor senses and buffers the current through thetransformer coil LT2 inferred through the low side switches SCN and SDN.The preferred embodiment of the current sensor has high bandwidthrelative to the fundamental switching frequency, good common moderejection, and is DC coupled. Other current sensing methods, such ashall sensors or isolation amplifiers, may be used by those experiencedin the art for transformer coil current sensing if they have sufficientbandwidth for the intended application. The current sensor drives thesynchronous average harmonic controller (308) which is composed of aswitched capacitor filter (R21, C1, C2, DCLA, DCLB and AS1, AS2) whichinjects a feedback signal through an inverting summing amplifier (0P2,R22, R23 and R24). The preferred switch embodiment for AS1 and AS2 usesa CMOS of JFET analog switch with low timing error, controlled on andoff impedance, and low charge injection. The switches (AS1 and AS2) aredriven with a square wave (SQ) and its logical complement (SQN) which issynchronous with the modulation triangle wave (TRI). The capacitors C1and C2 alternately average and compensate the current over each half ofthe switching frequency time period. The sampled signal from thecapacitors is used to adjust the non-resonant bridge's phase and itsdifferential duty cycle. The difference between each capacitor'sresponse results in a phase error signal, and the common capacitorresponse results in a differential duty cycle error signal. Assumingthat C1 and C2 have the same value and R21 and R22 have the same value,the feedback compensator's dynamics are approximated by the lineardynamic model given by R21 and C1. A series R-C network may be placed inparallel with both C1 and C2 to adjust the compensator dynamics. Theoutput of the synchronous average harmonic controller is the modulationtriangle waveform with superimposed feedback which is used by thenon-resonant bridge PWM controller to minimize the synchronous averageharmonic current.

The detailed schematic shown in FIG. 3 is illustrated in FIG. 4 withfunctionality replaced by equivalent block diagrams. The resonant andnon-resonant bridges shown in FIG. 4 , labelled 401 and 402, contain thesame components as 301 and 302 respectively. The resonant network (405)and isolation transformer (410) shown in FIG. 4 contain the samecomponents as FIGS. 3 (305 and 310) respectively. The resonant bridgePWM controller shown in FIG. 3 (306) is simplified in FIG. 4 as 406 toonly show its input duty cycle and triangle waveform (d1, TRI) andoutput gate signals (gA, gB). The non-resonant bridge current sensorshown in FIG. 3 (306) is simplified in FIG. 4 (406) to approximate thecurrent (ICD) directly and output a proportional buffered signal usingBUF1. The sign convention for current, ICD (or IAB), is positive forflow from VC to VD (or VA to VB). The synchronous harmonic controllershown in detail in FIG. 3 (306) is represented by the blocks shown inthe dashed control volume (408). The present embodiment uses phasefeedback and differential duty cycle feedback to transfer power whileminimizing synchronous average harmonic current. The harmonic current isbroken into low frequency, or 0^(th) harmonic, and ripple terms (orweighted Pt and higher harmonics). The controller calculates adifferential duty cycle signal, od, and a phase offset signal, φ, toreduce the synchronous average harmonic current and superimposes thesecontrol signals onto the modulation triangle waveform (TRI). The currentis synchronously modulated using the square wave (SQ), dynamicallycompensated using a filter, and then remodulated to result in the phaseoffset signal, φ. The current is also dynamically compensated using afilter to result in the differential duty cycle signal, dd. The phaseoffset signal, φ, differential duty cycle signal, δd, and trianglewaveform (TRI) are summed together and output from the synchronousharmonic controller. The non-resonant bridge PWM controller shown inFIG. 3 (309) is simplified in FIG. 4 as 409 to show its input duty cycle(d2) and the input modulation signal from the synchronous harmoniccontroller and output gate signals (gC, gD). The mechanism for the pulsewidth modulation and synchronous average harmonic controller isdescribed further in FIG. 5 , FIG. 6 , and FIG. 7 .

FIG. 5 illustrates the duty cycle modulation signals used by the bridgePWM controllers (306 and 309) shown in FIG. 3 . The signals areillustrated with a common time axis which is normalized to one switchingperiod. The first signal shown is the square waveform (SQ) which is highfor the first half of the switching period and low for the second halfof the switching period. The square wave is used by the synchronousaverage harmonic controller to synchronize its switched capacitorfilter. The triangle waveform (TRI) is the integral of the squarewaveform and both the square and triangle waveforms are synchronous withthe switching period. The triangle waveform is used by the resonantbridge PWM controller (306) to perform PWM duty cycle modulation, andthe non-resonant bridge PWM controller to perform PWM duty cycle andphase modulation. The illustrated positive (POS(d)) and negative(NEG(d)) duty cycle signals are shown where the negative duty cycle iscalculated by reflecting the positive duty cycle about its center value(d=0.5). The positive modulation pattern (PMOD) is created by comparingthe positive duty cycle (POS(d)) to the triangle waveform (TRI). Thenegative modulation pattern (PMOD) is created by comparing the trianglewaveform (TRI) to the negative duty cycle (NEG(d)). The differencemodulation pattern (DMOD) is the difference between the positive andnegative modulation patterns (PMOD and DMOD respectively). Otherequivalent methods are available to those experienced in the art toperform pulse width modulation, such as taking the difference betweensquare waves with opposing phase shifts or by comparing a duty cyclereference to two antiphase triangle waves. The difference modulationpattern (DMOD) represents the difference between the logical gatesignals (gA and gB) applied to the resonant bridge switches.

Harmonic analysis is used to describe the power transfer and resultingvoltages for the presently invented power converter. The resonant bridgevoltage is V₁·g_(AB) (θ), where V₁ is the rail voltage, g_(AB) (θ) isthe difference in logical gate signals for the resonant bridge, and θ isthe normalized angle (or normalized time) within the switching periodranging from −0.5 to 0.5. The first harmonic response for thedifferential gate signal, {right arrow over (g)}_(AB,k=1), over oneperiod is:

$\begin{matrix}{{\overset{\rightharpoonup}{g}}_{A,k} = {\frac{\sin\left( {d_{1}k\pi} \right)}{k\pi} \cdot e^{({{- 2}\pi{ik}\varphi_{1}})}}} & {{EQ}1A}\end{matrix}$ $\begin{matrix}{{\overset{\rightharpoonup}{g}}_{B,k} = {\frac{\sin\left( {d_{1}k\pi} \right)}{k\pi} \cdot e^{({{- 2}\pi{{ik}({\varphi_{1} + \frac{1}{2}})}})}}} & {{EQ}1B}\end{matrix}$ $\begin{matrix}{{\overset{\rightharpoonup}{g}}_{{AB},{k = 1}} = {{{\overset{\rightharpoonup}{g}}_{A,{k = 1}} - {\overset{\rightharpoonup}{g}}_{B,{k = 1}}} = {2 \cdot \frac{\sin\left( {d_{1}k\pi} \right)}{\pi} \cdot e^{({{- 2}\pi i\varphi_{1}})}}}} & {{EQ}1C}\end{matrix}$where {right arrow over (g)}_(A,k) and {right arrow over (g)}_(B,k)represents the k^(th) harmonic of the Fourier series for the first andsecond set of switches of the resonant side bridge (301) respectively,and {right arrow over (g)}_(AB,k) is the difference between {right arrowover (g)}_(A,k) and {right arrow over (g)}_(B,k). The harmonic,k=ω/ω_(c), is the analysis frequency normalized by the switchingfrequency (ω₁=ω_(c), is the carrier or switching frequency). Theamplitude, sin(d₁kπ)/kπ, results from integrating a signal with dutycycle, d₁, over the k^(th) harmonic basis function. The complex phase,e^((−2πikφ) ¹ ⁾, results from the normalized phase, φ₁, which is between−0.5 and 0.5 (or −180 to 180 degrees). The gate signals, {right arrowover (g)}_(A,k) and {right arrow over (g)}_(B,k), are 180 degrees out ofphase (consistent with the modulation process shown in FIG. 5 ). Thisresults in the difference between their first harmonics, {right arrowover (g)}_(AB,k=1), having twice the magnitude of the individual gatesignals. Other modulation patterns may be appropriate for reducedcomplexity embodiments, including but not limited to using complementaryswitch inputs (g_(B)=g_(A) and d_(B)=1−d_(A)) or replacing one half ofthe bridge with capacitors ({right arrow over (g)}_(B,0)={right arrowover (g)}_(A,0) and {right arrow over (g)}_(B,k)=0 for |k|>0).

The non-resonant bridge uses similar modulation processes to theresonant side bridge, but with the phase and differential duty cyclealtered to transfer power while minimizing synchronous average harmoniccurrent. The phase and differential duty cycle control paths arecompensated in the present embodiment by a switched capacitor filterwhich filters the non-resonant bridge current. The switched capacitorcircuit has two switches which are driven by a square wave to select oneof two dynamic averaging capacitors synchronously over each half of theswitching period. The switched capacitors are sampled each half cycle todrive the input to the phase and duty cycle servo. The filter has a lowfrequency and ripple current pathway shown electrically in FIG. 3 andusing a block diagram in FIG. 4 . These pathways share the samecomponents, but are selectively responsive to different inputfrequencies. The duty cycle differential servo feeds back on lowfrequency current to control the differential voltage on each half (VCand VD) of the non-resonant H-bridge. The phase servo feeds back on thehigh frequency ripple current (which is proportional to the harmonicvoltage between the bridges as shown in EQ6) to control the currenttransferred to the non-resonant H-bridge. The response for the filter tofeedback on each of these pathways is illustrated in FIG. 6 .

FIG. 6A shows the switched capacitor filter response used in thesynchronous average harmonic controller for a representative lowfrequency input from the current sensor (307). The common time axis forthe figure is illustrated for ten normalized switching periods. Thefirst waveform shown is LF IN which represents a low frequency signal.C1 (LF IN) and C2 (LF IN) show the first and second capacitor responserespectively due to low frequency signal. These capacitors are chargeddue to the voltage difference across R21 when each is respectivelyswitched into the circuit by AS1 and AS2. At low frequencies the twocapacitor responses are similar because the low frequency input has alonger period than the half period where each capacitor is alternatelyswitched into the circuit. The sampled response of the switchedcapacitors due to low frequency input is shown as SWCAP (LF IN). Thelinearized response, as calculated using a first order lowpass(f_(LP)=1/(2πR₂₁C₁)), is shown as LINEAR RESP (LF IN). The differentialduty cycle feedback path (illustrated conceptually in FIG. 7A) isselective to the switched capacitor response due to low frequencyinputs, which is common over each half-period.

FIG. 6B shows the switched capacitor filter response for arepresentative high frequency input from the current sensor (307). Thefirst waveform shown is HF INPUT which represents a high frequency (orripple current) signal. C1 (HF IN) and C2 (HF IN) show the first andsecond capacitor response respectively due to high frequency input. Athigh frequencies, the two capacitor responses are different because theinput varies over each half period when each capacitor is alternatelyswitched into the circuit. The sampled response of the switchedcapacitors due to high frequency input is shown as SWCAP (HF IN). Thelinearized response, shown as LINEAR RESP (HF IN), models the overallamplitude response of the filter, but differs because it is notmodulated. The phase feedback path (FIG. 7B) is selective to theswitched capacitor response due to high frequency (ripple) inputs, whichis different over each half-period.

FIG. 7A illustrates the mechanism of the differential duty cyclefeedback path. The common time axis of the figure is shown for oneswitching period. The triangle (701, TRI) waveform is used formodulation of the input duty cycle. Differential duty cycle feedbackkeeps the average duty cycle constant, while lowering the duty cycle ofone half (VC) of the non-resonant bridge (302), and increasing the dutycycle of the other half of the bridge (VD). This is shown in the FIG. 7Aas lines 702 (d2+∂d) and 703 (d2−∂d). The corresponding pulse widthmodulation pattern resulting from comparing each duty cycle to thetriangle wave is shown as lines 704 (PWM(d2−∂d)) and 705 (PWM(d2+∂d))respectively. The differential duty cycle feedback path alters theaverage voltage at VC and VD so that they are approximately equal toreduce low frequency current. In practice, the modulation pattern for VDis 180 degrees delayed in time with VC to result in an AC voltagedifference, but this was not illustrated as it does not affect theconceptual explanation of the differential duty cycle feedback.

FIG. 7B illustrates the mechanism of the phase feedback path. Thetriangle (711, TRI) wave is used for modulation of the input duty cyclewith phase offset. For the phase feedback path, line 712 (d2) shows astarting duty cycle and line 713 shows it with a superimposed phasecontrol signal (d2+φ). In this instance, the same phase signal isapplied to each half of the non-resonant bridge (302) resulting in acommon phase offset for VC and VD. The modulation pattern for line 715(PWM(d2+φ)) shows the effect of adding a phase control signal relativeto line 714 (PWM(d2)). The average duty cycle of the first modulationpattern (714) is preserved, but the phase control signal (713) resultsin advancing the pulse width modulation pattern (715). Both advance anddelay are achievable using this modulation scheme which superimposes asynchronous analog square wave to result in phase offset. Thesynchronous average harmonic controller generates the phase controlsignal which results in the synchronous average harmonic current beingreduced.

The presently invented converter transfers power across the isolationtransformer by altering the phase offset, φ=φ₂−φ₁, between the resonantand non-resonant bridges such that net current flows. For the purpose ofanalysis, the resonant side current and voltage are subscripted by 1 toindicate input, and the non-resonant side current and voltage aresubscripted by 2 to indicate output.

However, the input and output may be interchanged because the converteris bi-directional. The transferred current is controlled by the sine ofthe phase angle between the bridges and is scaled by maximum currentwhich is limited by the harmonic voltage and impedance.

The resonant bridge transfer current, mean(I₁), is given in terms of thecurrent, I_(AB), and the gate signal, g_(AB,ω), in EQ2:mean(I ₁)=((V ₁ ·{right arrow over (g)} _(AB,ω) −V ₂ ·{right arrow over(g)} _(CD,ω))⊙{right arrow over (Z)} _(ω) ⁻¹)·{right arrow over (g)}_(AB,ω)*  EQ2Amean(I ₁)=V ₁·({right arrow over (g)} _(AB,ω) ⊙{right arrow over (Z)}_(ω) ⁻¹)·{right arrow over (g)} _(AB,ω) −V ₂·({right arrow over (g)}_(CD,ω) ●{right arrow over (Z)} _(ω) ⁻¹)·{right arrow over (g)}_(AB,ω)*  EQ2Bmean(I ₁)=−V ₂({right arrow over (g)} _(cD,ω) ⊙{right arrow over (Z)}_(ω) ⁻¹)·{right arrow over (g)} _(AB,ω)  EQ2Cwhere {right arrow over (Z)}_(ω) ⁻¹ is Fourier series of the admittance(or inverse of the resonant impedance), and ‘⊙’ represents the Hadamardor element-wise multiply of each harmonic. The terms which modulate toDC (giving net current transfer) result from conjugate frequency pairs(e^(+ik)·e^(−ik)=e⁰=1) of the current, I_(AB)=((V₁·g_(AB,ω)−V₂·{rightarrow over (g)}_(CD,ω))⊙{right arrow over (Z)}_(ω) ⁻¹) and the modulatedgate signal, {right arrow over (C)}_(AB,ω). EQ2B distributes the termsfrom EQ2A, and EQ2C eliminates the terms which do not affect the DCcurrent due to the reactive impedance and symmetric harmonic expansion(V₁·({right arrow over (g)}_(AB,ω)⊙{right arrow over (Z)}_(ω) ⁻¹)·{rightarrow over (g)}_(AB,ω)=0).

EQ3A shows the first harmonic expansion which controls the currenttransfer, and EQ3B simplifies the expression using a sinusoidalexpansion of the gate signals:

$\begin{matrix}{{{mean}\left( I_{1} \right)} = {{{- 2} \cdot {Real}}\left( {V_{2} \cdot Z_{\omega 1}^{- 1} \cdot \left( {g_{{CD},{\omega 1}} \cdot {\overset{¯}{g}}_{{AB},{\omega 1}}} \right)} \right)}} & {{EQ}3A}\end{matrix}$ $\begin{matrix}{{{mean}\left( I_{1} \right)} = {{- \frac{8}{\pi^{2}}} \cdot V_{2} \cdot {❘Z_{\omega 1}^{- 1}❘} \cdot \left( {{\sin\left( {\pi \cdot d_{1}} \right)} \cdot {\sin\left( {\pi \cdot d_{2}} \right)}} \right) \cdot {\sin\left( {\pi \cdot \varphi} \right)}}} & {{EQ}3B}\end{matrix}$where d₁ and d₂ are the duty cycles for the resonant and non-resonantbridges respectively. The mean current transfer, mean(I₂), to thenon-resonant side is calculated in a similar fashion:

$\begin{matrix}{{{mean}\left( I_{2} \right)} = {\frac{8}{\pi^{2}} \cdot V_{1} \cdot {❘Z_{\omega 1}^{- 1}❘} \cdot \left( {{\sin\left( {\pi \cdot d_{1}} \right)} \cdot {\sin\left( {\pi \cdot d_{2}} \right)}} \right) \cdot {{\sin\left( {\pi \cdot \varphi} \right)}.}}} & {{EQ}4}\end{matrix}$The maximum current output occurs for full duty cycles and phase shift(d₁=0.5, d₂=0.5, φ=0.5) as:

$\begin{matrix}{{\max\left( {{mean}\left( I_{2} \right)} \right)} = {\frac{8}{\pi^{2}} \cdot V_{1} \cdot {❘Z_{\omega 1}^{- 1}❘}}} & {{EQ}5}\end{matrix}$where max(mean(I₂)) is the largest possible current transfer to V2 giventhe resonant impedance at the carrier frequency, Z_(ω1). FIG. 8A showsan example plotted for the maximum current as a function of frequency(801) given in EQ5. FIG. 8B shows how the normalized phase is used inEQ4 to vary current transfer as a fraction of the maximum (802) given inEQ5. The magnitude of power into each bridge, V₁·mean(I₁) andV₂·mean(I₂), calculated using EQ3B and EQ4 is equivalent when there isnegligible energy dissipation in the resonant impedance, {right arrowover (Z)}_(ω), and the transformer.

The presently invented converter has a diode clamp (DCLA and DCLB inFIG. 3 ) for the phase control signal to limit the resulting transfercurrent. The clamp also allows use of the most linear part of the phaseto current relationship. The analog phase signal used in FIG. 3 whichcan realize an advance or delay allows forward and reverse currenttransfer. Alternative methods for phase variation which employ logicaldelay signals require a whole cycle of delay to realize an apparentadvance and this can make stable compensator design more difficult.

The synchronous average harmonic controller implemented by the switchedcapacitor filter adjusts the phase shift (and resulting transfercurrent) between the bridges, φ, until an equilibrium condition is metwithin the maximum current limit. The voltage equilibrium is given byfinding the point where the current ripple signal, as defined as thedifference in average current over each synchronous half period, isminimized (or reduced to an appropriately low threshold) by the phasefeedback:ε=0=−((V ₁ ·{right arrow over (g)} _(AB,ω) −V ₂ ·{right arrow over (g)}_(CD,ω))⊙{right arrow over (Z)} _(ω) ⁻¹ −V ₂ ·{right arrow over (g)}_(CD,ω) ⊙{right arrow over (Z)} _(L) _(m) _(,ω) ⁻¹)·{right arrow over(g)} _(SQ,ω)*  EQ6A0=−V ₁·({right arrow over (g)} _(AB,ω) ⊙{right arrow over (Z)} _(ω)⁻¹)·{right arrow over (g)} _(SQ,ω) +V ₂·({right arrow over (g)}_(CD,ω)⊙({right arrow over (Z)} _(ω) ⁻¹ +{right arrow over (Z)} _(L)_(m) _(,ω) ⁻¹))·{right arrow over (g)} _(SQ,ω)*  EQ6BV ₂·({right arrow over (g)} _(CD,ω)⊙({right arrow over (Z)} _(ω) ⁻¹+{right arrow over (Z)} _(L) _(m) _(ω) ⁻¹))·{right arrow over (g)}_(SQ,ω) =V ₁·({right arrow over (g)} _(AB,ω) ⊙{right arrow over (Z)}_(ω) ⁻¹ ·{right arrow over (g)} _(SQ,ω)  EQ6Cwhere EQ6A is the equilibrium condition, ε=0 (or ε≈0), established bymultiplying the current in the non-resonant bridge, {right arrow over(I)}_(CD)=−((V₁·{right arrow over (g)}_(AB,ω)−V₂·{right arrow over(g)}_(AB,ω))⊙{right arrow over (Z)}_(ω) ⁻¹−V₂·{right arrow over(g)}_(CD,ω)⊙{right arrow over (Z)}_(L) _(m) _(,ω) ⁻¹), by the Fourierseries of the square wave, {right arrow over (g)}_(SQ,ω)*. The current,{right arrow over (I)}_(CD), includes flow across the resonantimpedance, (V₁·{right arrow over (g)}_(AB,ω)−V₂·{right arrow over(g)}_(CD,ω))⊙{right arrow over (Z)}_(ω) ⁻¹, and flow across theimpedance of the magnetizing inductance, V₂·{right arrow over(g)}_(CD,ω)⊙{right arrow over (Z)}_(L) _(m) _(,ω) ⁻¹. EQ6B expands theterms of EQ6A and minimizes them in accordance with the synchronousharmonic controller. The square wave, {right arrow over (g)}_(SW,ω),represents the difference in current averaged over each half cycle bythe switched capacitor averaging. The filter is selective to reduceharmonic content which is in phase with the square wave. Productivepower transfer is out of phase with the square wave and is not observedby the switched capacitor filter because it averages to zero over eachsynchronous half-period.

EQ6C is dominated by the first harmonic because the switched capacitoraveraging filter emphasizes the switching frequency. This allows forsimplification of EQ6C as:

$\begin{matrix}{\frac{V_{2}}{V_{1}} = {\frac{\left( {\left( {{\overset{\rightharpoonup}{g}}_{{AB},\omega} \odot {\overset{\rightharpoonup}{Z}}_{\omega}^{- 1}} \right) \cdot {\overset{\rightharpoonup}{g}}_{{SQ},\omega}^{*}} \right)}{\left( {\left( {{\overset{\rightharpoonup}{g}}_{{CD},\omega} \odot \left( {{\overset{\rightharpoonup}{Z}}_{\omega}^{- 1} + {\overset{\rightharpoonup}{Z}}_{L_{m},\omega}^{- 1}} \right)} \right) \cdot {\overset{\rightharpoonup}{g}}_{{SQ},\omega}^{*}} \right)} = \frac{\left( \left( {{\overset{\rightharpoonup}{g}}_{{AB},{\omega 1}} \cdot {\overset{\rightharpoonup}{Z}}_{\omega 1}^{- 1}} \right) \right)}{\left( \left( {{\overset{\rightharpoonup}{g}}_{{CD},{\omega 1}} \cdot \left( {{\overset{\rightharpoonup}{Z}}_{\omega 1}^{- 1} + {\overset{\rightharpoonup}{Z}}_{L_{m},{\omega 1}}^{- 1}} \right)} \right) \right)}}} & {{EQ}7A}\end{matrix}$ $\begin{matrix}{\frac{V_{2}}{V_{1}} = {\frac{❘g_{{AB},{\omega 1}}❘}{❘g_{{CD},{\omega 1}}❘} = \frac{\sin\left( {\pi \cdot d_{1}} \right)}{\sin\left( {\pi \cdot d_{2}} \right)}}} & {{EQ}7B}\end{matrix}$where the converter input output relationship (EQ7B) is controlled bythe ratio of duty cycles when the impedance due to magnetizinginductance, {right arrow over (Z)}_(L) _(m) _(,ω1), is large compared tothe series impedance, {right arrow over (Z)}_(ω1).

The non-resonant bridge current sensor used to approximate {right arrowover (I)}_(CD) is preferred in the first embodiment (FIG. 3 ) because ithas good measurement bandwidth. With d₂<50%, there may be some overlapbetween the sensed current for both switches which still produces ameaningful residual signal to feed back on. Another option to sensecurrent is to locate the current sensor in the switching referenceframe, but this presents challenges with respect to common moderejection, bandwidth, and parts complexity. Related modulation schemescan be used which result in improved sensing of the current by usingcomplementary inputs (such as with a blocking capacitor and g_(D)=g_(C)). Another option, if a capacitive half-bridge is used, is to place thesensed resistive shunt in series with a capacitor to the groundreference.

Another approach to control synchronous average ripple current is to usean analog phase locked loop comprised of an analog multiplying phasedetector, an integrating error amplifier, and a voltage-controlledoscillator. The alternate approach only operates at resonance (bydefinition) where the series resonant impedance cannot passively limittransfer current, and does not accept a clock which can be important forsynchronizing multiple converter phases. Prior methods which use phaselocked loops employing current zero-crossing based phase detectors onlyminimize the current at zero crossings and do not minimize thesynchronous average harmonic current resulting in different behavior.They can also have difficulty with bi-directional current transferbecause the direction of zero crossing changes with load currentreversal.

Examples of the presently invented converter's voltage gain given inEQ7B are illustrated in FIG. 9 . The horizontal axis shows the dutycycle and the vertical axis shows the gain. FIG. 9A shows buck gain(voltage attenuation) versus duty cycle. For this gain, d₁=d and d₂ isfixed at 0.5. FIG. 9B shows boost gain (voltage amplification) versusduty cycle. For this gain, d₁=0.5 and d₂=0.5−d. FIG. 9C shows buck-boostgain (voltage attenuation and amplification) versus duty cycle. For thismode, d₁=d and d₂=0.5−d. Other independent arbitrary duty cycles inputsbetween 0 and 1 are allowed for d₁ and d₂. The presently invented powerconverter realizes the gain relationship (EQ7B) because the synchronousaverage harmonic controller results in the equilibrium condition in EQ6.The predictable gain relationship allows for deterministic operationwithout isolated voltage sensing and results in load invariance (whennot intentionally current limited).

FIG. 10 shows the approximate ratio of the RMS transformer current andDC current for the presently invented power converter operating withbuck gain using a fixed load current. The RMS current is related topower dissipation from conduction losses, while the DC current isrelated to the power used by the load. The buck converter has d₁=d andd₂=0.5. Two lines are overlaid on the plot indicating the resonantbridge current and non-resonant bridge current respectively. The firstline (1001) is

$\left( {\frac{\pi}{\sqrt{8}} \cdot \frac{1}{\sin\left( {\pi d} \right)}} \right).$This quantity is the relationship between RMS and average current for anidealized harmonic converter based on power preservation. The secondreference line (1002) is

$\left( \frac{\pi}{\sqrt{8}} \right).$This is the relationship between RMS and average current assuming arectified sine wave.

FIG. 11 show the ratio of the instantaneous transformer current ({rightarrow over (I)}_(CD)) to the DC current (I₂) for the non-resonant bridge(302) for several duty cycles (d₁={0.125, 0.25, 0.50} and d₂=0.5). FIG.11A shows current (1103) for (d₁=0.125, d₂=0.5) and the differentialgate signals gAB (1101) and gCD (1102). FIG. 11B shows current (1113)for (d₁=0.25, d₂=0.5) and the differential gate signals gAB (1111) andgCD (1112). FIG. 11C shows current (1123) for (d₁=0.5, d₂=0.5) and thedifferential gate signals gAB (1121) and gCD (1122). The presentlyinvented converter's synchronous average harmonic controller causes theaverage current over the period to be approximately zero and thedifference in average current over each half period to be approximatelyzero. This can result in lower RMS current than switching using zerocrossings.

The presently invented converter has a small ripple current which can beused to ensure soft switching. The converter is configured for softswitching over a range of loads and duty cycles by setting themagnetizing inductance, L_(m). The non-resonant bridge creates arectangular voltage source across the magnetizing inductance whichlowpass filters the rectangular voltage to result in a triangular biascurrent. The bias current results in a negative IDs (current from drainto source for a MOSFET) at switch turn on and positive IDs at switchturn off. This results in soft switching by minimizing the voltagepotential at turn on and disabling the body diode at turn off. The biascurrent can be set to best minimize conduction and switching losses overa wide range of load currents.

The synchronous average harmonic controller in the presently inventedpower converter allows for bi-directional current transfer. This resultsfrom allowing for positive or negative phase shifts between therespective bridges which gives the present converter flexibility to beattached to loads which generate and store power such as inductive motorwindings or capacitive filters. The presently invented converter canhave the source or load on either the resonant or non-resonant side.FIG. 12 shows an embodiment of the presently invented converter with thesource and the load transposed. For both FIG. 12A and FIG. 12B, thesource is shown on the left as V1 and the load is shown on the right asan impedance (CL) and current (IL) drawing from V2. In FIG. 12A, theresonant bridge (1201A), resonant network (1205A) and resonant bridgePWM controller (1206A) is on the left side with the source. Thenon-resonant bridge (1202A), synchronous harmonic controller (1208A) andnon-resonant bridge controller (1209A) is on the right side with theload. FIG. 12B has the converter functional blocks reversed. In FIG.12B, the resonant bridge (1201B), resonant network (1205B) and resonantbridge PWM controller (1206B) is on the right side with the load. Thenon-resonant bridge (1202B), synchronous harmonic controller (1208B) andnon-resonant bridge controller (1209B) is on the left side with thesource. Other configurations are made possible by projecting elements ofthe resonant network (1205) across the transformer resulting in anequivalent resonant impedance, but these are not explored here becausethey may result in additional parts (for example extra DC blockingcapacitors).

The presently invented converter is configured for multipleindependently controlled resonant bridges as shown in the embodimentgiven in FIG. 13 . This embodiment has one input (V1) and two outputs(V2 and V3). The input has a resonant bridge (1301A), resonant network(1305A) and primary bridge PWM controller (1306A). The first output hasa non-resonant bridge (1302), synchronous harmonic controller (1308) anda non-resonant bridge PWM controller (1309). The second output uses itsown resonant bridge (1301B), resonant network (1305B), and resonantbridge PWM controller (1306B). The isolation transformer (1310) and thesynchronous average harmonic controller (1308) couple each input andoutput resulting in:

$\begin{matrix}{\frac{V_{2}}{V_{1}} = \frac{\sin\left( {\pi \cdot d_{1}} \right)}{\sin\left( {\pi \cdot d_{2}} \right)}} & {{EQ}8A}\end{matrix}$ $\begin{matrix}{\frac{V_{3}}{V_{1}} = \frac{\sin\left( {\pi \cdot d_{1}} \right)}{\sin\left( {\pi \cdot d_{3}} \right)}} & {{EQ}8B}\end{matrix}$where d₁ is the duty cycle for the resonant bridge input, d₂ is the dutycycle for the non-resonant bridge output, and d₃ is the duty cycle forthe resonant bridge output. Each voltage is controlled by duty cyclesusing the same relationship as given earlier in EQ7B. Sufficient degreesof freedom are available to independently regulate each output. Thisregulation does not require any additional series power parts after thebridge and bulk capacitance is shared for the purposes of energy storagebecause the power converter allows bidirectional power transfer. Thisapplication enables independently regulated auxiliary supplies using onetransformer and allows for multiple isolated regulated power loads. Theresonant bridge output may be configured to use its own synchronousaverage harmonic current controller to minimize ripple current if itsresonant frequency differs significantly from the input resonant bridge.

While particular embodiments have been illustrated and described herein,it should be understood that various other changes and modifications maybe made without departing from the spirit and scope of the claimedsubject matter. Moreover, although various aspects of the claimedsubject matter have been described herein, such aspects need not beutilized in combination. It is therefore intended that the appendedclaims cover all such changes and modifications that are within thescope of the claimed subject matter.

The invention claimed is:
 1. A power converter comprising: a firstbridge circuit comprising a first plurality of switching devices coupledto a first transformer winding of a transformer device; at least onefirst controllers coupled to the first plurality of switching devicesand configured to generate first control signals for the first pluralityof switching devices; a second bridge circuit comprising a secondplurality of switching devices coupled to a second transformer windingof the transformer device; a resonant network coupled to the firsttransformer winding, or the second transformer winding, or both thefirst transformer winding and the second transformer winding; and atleast one second controllers coupled to the second plurality ofswitching devices and configured to generate second control signals forthe second plurality of switching devices, the at least one secondcontrollers comprising: a synchronous average harmonic currentcompensator configured to average and compensate a measured currentsignal synchronously over each half of a switching period and samplecompensator output; a differential duty cycle feedback loop configuredto control on an average current over the switching period, wherein adifferential duty cycle command increases a duty cycle in one half ofthe second bridge or decreases a duty cycle in an other half of thesecond bridge or modifies a differential duty cycle across the secondbridge; a phase feedback loop configured to control a difference inaverage current over each half switching period by adjusting a phasecommand, wherein the phase command causes net current flow couplingharmonic voltages of the first bridge circuit and the second bridgecircuit; and a synchronous pulse width modulation process wherein areference duty cycle is modulated to generate a phase shifted pulsewidth modulation waveform with prescribed average reference duty cycle.2. The power converter of claim 1, wherein the synchronous averageharmonic current compensator further comprises: a switched capacitorfilter circuit configured to average and compensate the measured currentsignal synchronously over each half of the switching period andalternately sample each half switching period average to generate thedifferential duty cycle command and the phase command; and a clampoperatively configured to limit a total relative phase to limit current.3. The power converter of claim 2, wherein the switched capacitor filtercircuit comprises a first switched capacitor coupled to a first switchedcapacitor switching device, and a second switched capacitor coupled to asecond switched capacitor switching device.
 4. The power converter ofclaim 3, wherein the switched capacitor filter circuit further includesat least one capacitor resistor network parallel to the first switchedcapacitor, the second switched capacitor, or both the first switchedcapacitor and the second switched capacitor.
 5. The power converter ofclaim 1, wherein the at least one second controllers further comprises acurrent sense pre-amplifier operatively coupled to a current sensor. 6.The power converter of claim 5, wherein the current sensor is in-linewith the second transformer winding.
 7. The power converter of claim 1,wherein the first plurality of switching devices comprises a full bridgecircuit comprising at least two pairs of switching devices.
 8. The powerconverter of claim 1, wherein the first plurality of switching devicescomprises at least two switching devices coupled to at least onecapacitor to form a capacitive half-bridge.
 9. The power converter ofclaim 1, wherein the second plurality of switching devices comprises afull bridge circuit comprising at least two pairs of switching devices.10. The power converter of claim 1, wherein the second plurality ofswitching devices comprises at least two switching devices coupled to atleast one capacitor to form a capacitive half-bridge.
 11. The powerconverter of claim 1, wherein the transformer device comprises the firsttransformer winding and the second transformer winding, and furthercomprising a determined turn ratio relative to the first bridge circuit.12. The power converter of claim 1, wherein the at least one firstcontroller further comprises a plurality of modulators coupled to thefirst plurality of switching devices and configured to generate thefirst control signals wherein a difference voltage comprises an AC pulsewidth modulated waveform synchronous with the switching period.
 13. Thepower converter of claim 1, wherein the first bridge circuit comprises aresonant bridge circuit and the second bridge circuit comprises anon-resonant bridge circuit.
 14. The power converter of claim 1, furthercomprising one or more independently regulated auxiliary supplies. 15.The power converter of claim 1 wherein the resonant network is furthercomprised of an inductance and a capacitive impedance device.
 16. Thepower converter of claim 1 wherein the first and second controllercircuit are incorporated into an integrated circuit.
 17. The powerconverter of claim 1, wherein the synchronous average harmonic currentcompensator is further comprised of an analog multiplying phasedetector, an integrating error amplifier and a voltage controlledoscillator.
 18. The power converter of claim 1 wherein the at least onefirst controllers is further comprised of a differential pulse widthmodulation process which generates a difference between square waveswith opposing phase shifts.
 19. A method comprising: sensing a currentin a second bridge circuit of a bi-directional power convertercomprising a first bridge circuit and the second bridge circuit, whereinthe sensed current is sensed in at least one of a second side coil of atransformer device of the bi-directional power converter or in aswitching reference frame; generating first control signals for thefirst bridge circuit; driving a filter circuit by an amplifier thatreceives the sensed current; averaging and compensating the sensedcurrent synchronously over each half of a switching period andalternately sampling each half switching period signal; controllingaverage current over the switching period by increasing a relative dutycycle in one half of the second bridge circuit or by decreasing arelative duty cycle for an other half of the second bridge circuit, ormodifying a differential duty cycle across the second bridge circuit;controlling a difference in average current over each half switchingperiod by adjusting a phase command, wherein the phase command causesnet current flow that couples harmonic voltages of the first bridgecircuit and the second bridge circuit; and generating a phase shiftedpulse width modulation waveform with prescribed average reference dutycycle.
 20. The method of claim 19, further comprising limiting a totalrelative phase.